Analog / Mixed Signal Design Engineer
PseudolithIC
PseudolithIC, Inc is a rapidly-growing semiconductor start-up company based in Santa Barbara, CA pioneering heterogeneous integration for radio-frequency integrated circuit solutions. Our unique integrated circuit process offers circuit designers a unique opportunity to combine the benefits of multiple transistor technologies in a single silicon process. This position would be responsible for the design of analog/mixed-signal integrated circuits in a CMOS process that would include compound semiconductor devices. We are looking for a team member comfortable with a start-up environment and evolving roles in product definition and design testing of integrated circuits.
The Analog/Mixed-Signal IC Design Engineer will contribute to core RF and millimeter-wave products developed in PseudolithIC's heterogeneous integration platform based on a combination of silicon and compound semiconductor devices. The designer will incorporate analog and mixed-signal circuitry for applications that involve power amplifiers, low noise amplifiers, frequency converters and synthesizers. The designer will develop strategies to co-design between silicon and compound semiconductor devices, offering new opportunities to develop unique IP. The Analog/Mixed-Signal IC Design Engineer will work collaboratively within the Design Group to produce high-performance circuits based on a variety of integrated circuit platforms and will need to anticipate testing, packaging, and verification approaches that reduce product cost. Critical to the role will be the development of calibration, control, and test circuitry that can operate in a range of environments. The team member will work closely with the manufacturing team and other stakeholders. Successful candidates will thrive in a hands-on, independent role and can offer leadership. The position seeks veteran candidates who can adapt to management roles.
Qualifications
- Deep understanding of analog and mixed-signal integrated circuit design. Development of IP blocks such as operational amplifiers, analog-to-digital/digital-to-analog, or other analog circuits including optimization of noise, linearity, mismatch, stability, and other impairments with respect to power consumption.
- Ability to design and develop built-in self-test strategies
- Modeling, design, and test experience in silicon CMOS
- Experience with Cadence Virtuoso Environment and Keysight ADS
- Fluency with parasitic extraction and post-layout verification
- Knowledge of design automation software
- 5+ years of industry experience in the field of Si/SOI/SiGe with demonstrated design and product success
- Strong communications and documentation skills
- BS/MS/PhD in electrical engineering or related
- Preferred experience with wireless/RFIC products
Compensation
Target base salary for this role is $160,000 - $210,000 per year + meaningful equity + bonus + benefits + 401k. Our salary ranges are determined by role, level, experience, and location.
This position must meet Export Control compliance requirements, therefore a "U.S. Person" as defined by 22 C.F.R. § 120.15 is required. "U.S. Person" includes U.S. Citizen, lawful permanent resident, refugee, or asylee.
PseudolithIC, Inc. is an Equal Employment Opportunity employer and does not discriminate in recruiting, hiring, training or promoting, on the basis of race, ethnicity, color, creed, religion, sex, sexual orientation, gender, gender identity, genetic information, national origin, physical or mental disability, pregnancy, medical condition, age, U.S. military or protected veteran status, union membership, or political affiliation.